Missile Target Display Part 2

In my last post I started doing a more detailed look at the Identification Friend or Foe (IFF) system component shown in a recent video from Fran Blanche.

https://www.youtube.com/watch?v=dXrLSOReMFA

The information in this post is based on only what I could see in the video, so there things I cannot be sure of.

On board A3 there is an array of 12, 4-bit register ICs. Since the displays on the front panel only need 4 bit each, it’s safe to assume that these registers are holding the values for 12 of the digits being displayed on the front panel. 

The A2 board has another set of four registers. These could be the remaining registers for the main part of the display, or they could the mode display on the left. There should still be four more registers somewhere so they may be on the one board that wasn’t shown in the video.

Here is one other interesting circuit I was able to identify, there are three instances of this on the boards I can see. The 7485 is a 4 bit comparator, it takes two 4-bit inputs and outputs one of three signals indicating if the one input is less then, greater then, or equal to the other. We can see that one set of inputs is connected to 7474 flip flops. I wasn’t able to see which of the three outputs is being used. One possibility is that these circuits are determining which data gets displayed on each row of the display. The desired display could be latched into the flipflops and when the corresponding data becomes available the “equals” output would latch in that data.

Missile Target Display Part 1

A while back I ran across Fran Blanche’s YouTube channel. Fran does a lot of  great electronic engineering videos, especially videos about vintage electronics. Recently she did a video about a component from an 80’s era missile tracking system. You can see the video here:

https://www.youtube.com/watch?v=dXrLSOReMFA

The video has some good closeups of some of the boards, good enough quality that I could trace out some of the circuits and learn more about how the device worked. The device she shows is an intra-target data indicator display out of an Identification Friend or Foe (IFF) system. One of the comments on the video provided a link to a document about this system:

https://www.globalsecurity.org/military/library/policy/navy/nrtc/14308_ch8.pdf

The device has four circuit cards that go into a small rack assembly and are connected with a backplane. There is also a circuit board on the front that holds the LED displays. The video provides a good look at the front and back of two of the circuit card, shows the front of the third, but does not show the fourth at all. There is also some pretty good shots of the front panel board. Since these are just double sided boards I was able to trace out a good bit of two of the boards. Of course in cases where traces go under chips I can’t tell where they go, so the circuit diagrams are far from complete.

Let’s start with the front panel, here is a picture from the video.

As you can see there are 20 seven-segment LED displays. According to the document linked above the four on the left show what “mode” is being displayed on the ones on the right. The four chips are Fairchild 9368dc’s which are seven-segment decoder/drivers. A four bit binary value in input into A0-A3 and the chip will output the correct segment pattern to generated the digits 0-9 and the hex letters A-F. The displays also have a decimal point which this chip does not control. I am not sure if the decimal points are used or not.

Since there are only four drivers on the front board, and only 30 wires running from the front board to the rest of the device, it’s not possible for there to be a single decoder chip for each seven-segment display. Based on this they must be multiplexing the decoders so each can drive multiple displays.

Looking at the schematic I traced for the A3 board I found this circuit:

The configuration of the transistors appears to be what is known as a Darlington Pair. This is a way of connecting transistors to allow them to drive a high current device. The resistors are also common in this configuration to bleed voltage from capacitance that is inherent in transistor which allows for faster switching.

Since there are four identical circuits here and four drivers on the front panel, my guess is that this combination drives the 4x4 array of displays. Based on the traces I can see on the display board the driver chips are connected to all four displays in a column, so each of these driver circuits would enable one row at a time thus allowing the four drivers to drive 16 displays. I wasn’t able to trace where the NAND gate inputs went but I assume one input of each goes to a circuit that is sequencing through the four rows of the display. The other input may be used to blank out a row that has no data to be displayed.

So, what about the the first column of displays? That is probably where this chip from the A2 board comes into play.

I assume this one is multiplexed to drive the first column. This is further supported by  the fact that the A2 and A3 pins are tied together, which makes is so the chip can only display 0-3, and C-F. Looking at the document I linked to above it appears that that those displays only ever need to show 1-3 and C so this configuration would support that.

HPC Microcontroller Development System–Front Panel

The final piece of the system to look at is the front panel. Here is the front of it where you can see the reset switch, a switch to control the EPROM programmer voltage and the ZIF socket for the EPROM programmer.

On the back there is a small PCB that connects to the two switches. Most of the circuitry on here appears to be to generate the EPROM programmer voltages. Below that PCB is the connector for the ZIF socket. The interesting part of this is that the whole front panel is actually a PCB itself. You can see where the ZIF socket is soldered in and the traces that lead to the connector.

HPC Microcontroller Development System–Pod2

This is the second board in the pod called the SUMMIT-POD2 board. The blue connectors connect to the buffer board and the part on the right connects to the processor socket on the target system. I will talk about that a bit more below. The board is composed of some standard TTL logic chips, a couple PALs and two large PLCC packaged chips. The U10 socket was empty on the board when I got the system. The top chip is an HPC46003V20, which is the processor that this system emulates. It’s not uncommon in an in-circuit emulator to have the processor being emulated in the interface pod where it can be physically close to the circuit that is using the processor.The second larger chip is labeled SCX6B48AHF. I believe this is a custom gate array chip designed just for this system. I assume this chip provides the interface between the development system and the processor being emulated.

Here is the back of the board. On the right you can see how the pod plugs into the socket on the system under test where the processor would go.

Here is a closeup of the ribbon cable that connects the two boards. The cable is actually manufactured into the PCB. The ribbon is sandwiched into the inner layers of the PCB. This makes the connection between the boards flexible so the pod can easily be connected to the processor socket.

HPC Microcontroller Development System–Pod Buffer

In my last post I showed the buffer board that was in the main unit. The board connected to the interface pod with a long cable which connected to another buffer board in the pod.

The board is composed mainly of bus driver ICs and DIP resistor packs. There are also PAL (Programmable Array Logic) chips. The connectors on the left appear to be for external trigger signals that the system can monitor and react to.

On the back of the board the three blue connectors connect to the other board in the pod, and there for connectors on the left are for the cable to the main unit. There is also two pin connector at the bottom the brings power to the pod.

The most interesting thing about this board is that it is the only surface mount board in the system, everything else is through-hole. I did notice that the chips on the other boards had date codes from the late 80’s up until 1990, but this board has date codes of 1994 and 95. I guess it’s possible this board was originally done as through-hole but at some point in the life of the unit it got replaced with newer board which was surface mount.

HPC Microcontroller Development System–Buffer Board

The next board in the system is called the buffer board. This board is the interface between the personality board and the long cable that goes to the interface pod. The board buffers the signals for the long run through the cable.

The component side is mainly 74 series line drivers and DIP resistor packs. The four connectors on the left are for the interface pod cable.

The back of the board has the connectors that connect to the personality board.

HPC Microcontroller Development System–Personality Board

The next board we are going to look at is the Personality Board. Unlike the Brain Board which is common to all version of the development system, there is a different Personality Board for each processor.

The databook lists the following details for this board:

“The Personality Board consists of a firmware Monitor, 16k bytes of shared memory,
2k x 48 Trace memory, Port recreation logic to recapture the pins used for emulation, emulation hardware, and an In System Emulator, ISE, cable.

Up to eight external events as well as 16-bit address and 16-bit data busses can be traced in the 2k deep trace memory.”

A,B – MCM2018AN45 – 2048 x 8 static RAM

C – AM27512 – 64K x 8 EPROM

D – Brain board connectors

E – This 40 pin socket seems to have been intentionally left empty. Not sure what purpose it served.

F – This is where the buffer board plugs in which connects to the interface pod.

G – (4) MCM2018AN45 – 2048 x 8 static RAM

H - TC55464 – 64K x 4 static RAM

I – (3) MCM2018AN45 – 2048 x 8 static RAM

J – (2) 71256 – 32K x 8 static RAM

K – Power connector

On the back of the board you will see a bunch of wire-wrap wires. These are manufacturing modifications to the board. When design problems were found with boards it wasn’t always economical to create a new PCB so it was quite common for modifications like this to be done during the manufacturing process. Most of these wires connect back to a EP8201 delay line IC that was added to the board. A delay line has one input and multiple outputs the delay the signal be specific amounts of time. Based on this they probably found a timing issue with parts of the circuit so had to make the modification to alter the timing.