Missile Target Display Part 2

In my last post I started doing a more detailed look at the Identification Friend or Foe (IFF) system component shown in a recent video from Fran Blanche.

https://www.youtube.com/watch?v=dXrLSOReMFA

The information in this post is based on only what I could see in the video, so there things I cannot be sure of.

On board A3 there is an array of 12, 4-bit register ICs. Since the displays on the front panel only need 4 bit each, it’s safe to assume that these registers are holding the values for 12 of the digits being displayed on the front panel. 

The A2 board has another set of four registers. These could be the remaining registers for the main part of the display, or they could the mode display on the left. There should still be four more registers somewhere so they may be on the one board that wasn’t shown in the video.

Here is one other interesting circuit I was able to identify, there are three instances of this on the boards I can see. The 7485 is a 4 bit comparator, it takes two 4-bit inputs and outputs one of three signals indicating if the one input is less then, greater then, or equal to the other. We can see that one set of inputs is connected to 7474 flip flops. I wasn’t able to see which of the three outputs is being used. One possibility is that these circuits are determining which data gets displayed on each row of the display. The desired display could be latched into the flipflops and when the corresponding data becomes available the “equals” output would latch in that data.

Missile Target Display Part 1

A while back I ran across Fran Blanche’s YouTube channel. Fran does a lot of  great electronic engineering videos, especially videos about vintage electronics. Recently she did a video about a component from an 80’s era missile tracking system. You can see the video here:

https://www.youtube.com/watch?v=dXrLSOReMFA

The video has some good closeups of some of the boards, good enough quality that I could trace out some of the circuits and learn more about how the device worked. The device she shows is an intra-target data indicator display out of an Identification Friend or Foe (IFF) system. One of the comments on the video provided a link to a document about this system:

https://www.globalsecurity.org/military/library/policy/navy/nrtc/14308_ch8.pdf

The device has four circuit cards that go into a small rack assembly and are connected with a backplane. There is also a circuit board on the front that holds the LED displays. The video provides a good look at the front and back of two of the circuit card, shows the front of the third, but does not show the fourth at all. There is also some pretty good shots of the front panel board. Since these are just double sided boards I was able to trace out a good bit of two of the boards. Of course in cases where traces go under chips I can’t tell where they go, so the circuit diagrams are far from complete.

Let’s start with the front panel, here is a picture from the video.

As you can see there are 20 seven-segment LED displays. According to the document linked above the four on the left show what “mode” is being displayed on the ones on the right. The four chips are Fairchild 9368dc’s which are seven-segment decoder/drivers. A four bit binary value in input into A0-A3 and the chip will output the correct segment pattern to generated the digits 0-9 and the hex letters A-F. The displays also have a decimal point which this chip does not control. I am not sure if the decimal points are used or not.

Since there are only four drivers on the front board, and only 30 wires running from the front board to the rest of the device, it’s not possible for there to be a single decoder chip for each seven-segment display. Based on this they must be multiplexing the decoders so each can drive multiple displays.

Looking at the schematic I traced for the A3 board I found this circuit:

The configuration of the transistors appears to be what is known as a Darlington Pair. This is a way of connecting transistors to allow them to drive a high current device. The resistors are also common in this configuration to bleed voltage from capacitance that is inherent in transistor which allows for faster switching.

Since there are four identical circuits here and four drivers on the front panel, my guess is that this combination drives the 4x4 array of displays. Based on the traces I can see on the display board the driver chips are connected to all four displays in a column, so each of these driver circuits would enable one row at a time thus allowing the four drivers to drive 16 displays. I wasn’t able to trace where the NAND gate inputs went but I assume one input of each goes to a circuit that is sequencing through the four rows of the display. The other input may be used to blank out a row that has no data to be displayed.

So, what about the the first column of displays? That is probably where this chip from the A2 board comes into play.

I assume this one is multiplexed to drive the first column. This is further supported by  the fact that the A2 and A3 pins are tied together, which makes is so the chip can only display 0-3, and C-F. Looking at the document I linked to above it appears that that those displays only ever need to show 1-3 and C so this configuration would support that.