Atari CPS SuperSALT Test Assembly ADC

In my last post I introduced the Atari CPS SuperSALT Test Assembly which is used as part of the SuperSALT test to verify the ports on the Atari computer. The test assembly has a number of test functions, so the first one I will look at is the Analog to Digital Convertor (ADC). 

The ADC is part number ADC0816. It has 16 channels and 8 bit resolution. You can see a data sheet here. The channels are assigned as follows:

0 – Onboard 5 volt
1 – 5 volt from SIO port
2 – 5 volt from J1 Port
3 – 5 volt from J2 Port
4 – 5 volt from J3 Port (400/800 only)
5 – 5 volt from J4 port (400/800 only)
6 – Ground from Serial Port
7 – Ground from J1 port
8 – Ground from J2 port
9 – Ground from J3 port (400/800 only)
10 – Ground from J4 port (400/800 only)
11 – Motor control line from SIO port
12 – 12 Volt line from SIO port (400/800 only)
13 – Positive half-cycle current draw (400/800/1200XL)
14 – Negative half-cycle current draw (400/800/1200XL)
15 – Onboard ground line

Which channels are tested is based on the type of machine. The XL series computers only have two joystick ports so the channels for the other two are not needed for these computers. The 400 and 800 supply 12 VDC on pin 12 of the SIO connector, but this is absent on the XLs. The current measurements are done by passing the power from the AC adaptor through the test box so the current draw can be measured. This only done on the 400 and 800 since the current measurement circuit is designed to measure the 9 VAC input voltage they use. 

The ADC is controlled with a combination of joystick ports 1 and 2 and the data signal from the SIO port. The sequence for reading the ADC is as follows:

1. Set PORTA (which controls joystick ports 1 and 2) to output
2. Write the ADC channel number to bits 0 - 3 of PORTA and set bit 7 to 0 to switch the baud rate generator to fast clock.
3. Wait approximately 1280 CPU cycles.
4. Set bit seven of SKCTL to 1 to latch the channel number and reset the ADC.
5. Wait approximately 1280 CPU cycles.
6. Set bit seven of SKTCL to 0 to start the ADC.
7. Wait approximately 2560 CPU cycles.
8. Set PORTA to input. 
9. Read the eight bit ADC value from port A.

Atari CPS SuperSALT Test Assembly

 

The CPS SuperSALT was a system used to test Atari 8-bit computers (400/800/XL) both in a factory setting and for after market repair. The system was composed of a cartridge with the test software and a special test assembly that was build into Atari 850 interface module case. The assembly is needed to completely test the Joystick and SIO ports. 

Here are pictures of two different version of the test assembly.

REV O:

REV C:

The technical reference manual for this device can be found here:

http://www.atarimania.com/documents/CPS_Supersalt_Technical_Users_Manual.pdf

That manual contains schematics that appear to be for the Rev O board since it has a power switch which is absent on Rev C.

There is also an Error Display add on board. In the schematics this is labeled "for future use", but I do have pictures of board, although there are no schematics available for it. 

Over my next few posts I will talk about how this device worked.