Friday, March 24, 2023

Atari CPS Super Salt - SIO Test

This is the next in a series of posts about the Atari CPS Super Salt Test Assembly. In this post I will look at the SIO test. 

Lets start by looking what is basically the middle of the circuit. U1 is a 4053 analog switch IC, redrawn here to make it easier to understand. This chip is basically three switches each of which is controlled by a digital input. 

Switch A is used for the clock input to the computer. It is controlled by pin 1 of the first joystick port and can switch between a baud rate generator and the output clock from the computer. Looping the out clock to the in will test these pins on the port, but this would not validate that the computer is sending data at the correct clock speed, thus the need for the baud rate generator. 

Switch B is used for the data to the computer. It is controlled by pin 2 of the first joystick port and can be switched between a data generator and the data output from the computer. 

Switch C is used for the SIO audio input. It is controlled by pin 3 of the first joystick port when the Motor Control output of the SIO port is high. It can either be unconnected so there is no audio input, or it can be connected to switch A so it can get either the output clock or the baud generator. There is no way for the computer to actually sample the audio input so this test relies on the operator listening for tones. 

Now lets look at the SIO connector. Pins 1,2,3 and 5 are the clock and data inputs and outputs. As we saw above these connect to the analog switch which allows these to be tested in various ways. Pin 7 is the command output which connects to Interrupt input thus allowing those two signals to be tested. Likewise, the Motor Control output is connected to the Proceed input. Pin 10 is just a +5v output from the computer so goes to the ADC as described in my previous post. Pin 11 is the audio input which was described above. Finally, pin 12 is a +12V output on the 400/800 and also goes to the ADC.

There appears to be a mistake in this section of the schematics. The output of inverter U11 is used to control certain test modes through U2. You can see that the input to the pair of inverters is connected through a resistor to ground which would leave no way for this signal to be controlled. There is a wire coming from Motor Control that crosses between the resistor and Pin 11 of U11, so I believe there is supposed to be a connection there so Motor Control becomes the input to those two inverters. 





Next lets look at the baud rate generator, U6. The clock starts from 1.8432 MHz crystal oscillator which is then divided down into 6 baud rates, 9600, 4800, 2400, 1200, 600 and 300. If pin 4 of joystick port 1 or 2 is set low, this will bring RSA high and provide a 19200 baud rate, and a 76.8 KHz clock to the ADC. The clocks go to data selector U5 and one is selected based on the value on pins 1-3 of  joystick port 1 or 2 and is passed to U1 as described above. 


The final section of the SIO test is the data generator. This section starts with a binary counter clocked from the baud rate generator. The counter counts from 0 to 15 and drives a 16 bit data selector U3. The inputs of the data selector are setup to generate a serial sequence of 0000101010101000 which can be fed to the SIO input of the system being tested.,  







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